Vehicle-onboard driving lane recognizing apparatus

ABSTRACT

A vehicle-onboard driving lane recognizing apparatus of a small scale includes an image pick-up unit ( 1 ) mounted on a motor vehicle for picking up images of scenes making appearance in front of the motor vehicle, an image data selecting unit ( 2 ) for selecting image data only of a predetermined region from the image picked up by the image pick-up unit ( 1 ), an image data storing unit ( 3 ) for storing the image data, and a driving lane recognizing unit ( 4 ) for detecting lane markings ( 21 ) on the road from the image data stored in the image data storing unit ( 3 ) to thereby recognize a driving lane extending along the lane markings ( 21 ). The image data selecting unit ( 2 ), the image data storing unit ( 3 ) and the driving lane recognizing unit ( 4 ) are all implemented in a single chip.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a driving lane recognizingapparatus mounted on a motor vehicle (hereinafter referred to as thevehicle-onboard driving lane recognizing apparatus) for detecting lanemarkings to recognize a driving lane.

[0003] 2. Description of Related Art

[0004] Heretofore, there have been proposed and developed a greatvariety of vehicle-onboard driving lane recognizing apparatuses whichare designed for detecting lane markings or the like existing in frontof a running motor vehicle to recognize a driving lane therefor.

[0005] In general, the conventional vehicle-onboard driving lanerecognizing apparatus known heretofore is comprised of a CCD(Charge-Coupled Device) camera serving as an image pick-up means (alsoknown as the imaging means) and a recognition processing unit serving asa recognizing means. The CCD camera is installed on, for example, aceiling portion of the motor vehicle located in the vicinity of a driverseat for picking up image scenes such as landscapes or the like makingappearance in front of the motor vehicle in the course of running.

[0006] In that case, the imaging range of the CCD camera is oriented orset such that a road extending for a predetermined distance before themotor vehicle can be covered by the landscape or scene picked up whenthe motor vehicle is running on the road.

[0007] On the other hand, the recognition processing unit is comprisedof an analog-to-digital converter (ADC), a pre-processing ASIC(Application Specified IC), an image memory, a CPU (Central ProcessingUnit), a ROM (Read-Only memory), a communication IC (Integrated Circuit)and others.

[0008] The analog-to-digital converter serves for converting an analogimage signal outputted from the CCD camera into digital image data. Thepre-processing ASIC executes a predetermined pre-processing on the imagedata outputted from the analog-to-digital converter. As suchpre-processing, there may be mentioned, by way of example, an edgeemphasizing or enhancing filter processing. The image memory is destinedfor storing the image data resulting from the pre-processing.

[0009] The CPU executes a processing for the stored image data torecognize the lane markings contained therein.

[0010] The RAM serves as a work area for the CPU, while thecommunication IC serves to transmit to a relevant external system orequipment the data such as, for example, the result of recognition ofthe lane markings transferred from the CPU. For more particulars,reference may have to be made to Japanese Patent Application Laid-OpenPublication No. 213155/1999 (JP-A-11-213155).

[0011] In the conventional vehicle-onboard driving lane recognizingapparatus mentioned above, the analog-to-digital converter, thepre-processing ASIC, the image memory and the RAM are implementedindividually as discrete chips, respectively, as a result of which thecircuit scale of the vehicle-onboard driving lane recognizing apparatusbecomes large and involves high cost in the implementation thereof,giving rise to a problem.

SUMMARY OF THE INVENTION

[0012] In the light of the state of the art described above, it iscontemplated with the present invention as an object thereof to solvethe problem mentioned above by providing an inexpensive vehicle-onboarddriving lane recognizing apparatus of a small circuit scale.

[0013] In view of the above and other objects which will become apparentas the description proceeds, there is provided according to a generalaspect of the present invention a vehicle-onboard driving lanerecognizing apparatus which includes an image pick-up unit mounted on amotor vehicle running on a road for picking up images of scenes makingappearance in front of the motor vehicle, an image data selecting unitfor selecting image data only of a predetermined region from the imagepicked up by the image pick-up unit, an image data storing unit forstoring the image data, and a driving lane recognizing unit fordetecting lane markings on the road from the image data stored in theimage data storing unit to thereby recognize a driving lane extendingalong the lane markings, wherein at least the image data selecting unit,the image data storing unit and the driving lane recognizing unit areall implemented in a single chip.

[0014] By virtue of the arrangement described above, there can berealized inexpensively the vehicle-onboard driving lane recognizingapparatus of a small circuit scale while making it unnecessary toinstall an external image data storing unit, to advantageous effect.

[0015] The above and other objects, features and attendant advantages ofthe present invention will more easily be understood by reading thefollowing description of the preferred embodiments thereof taken, onlyby way of example, in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In the course of the description which follows, reference is madeto the drawings, in which:

[0017]FIG. 1 is a block diagram showing generally and schematically anarrangement of a vehicle-onboard driving lane recognizing apparatusaccording to a first embodiment of the present invention;

[0018]FIG. 2 is a block diagram showing a circuit arrangement of animage data selecting means according to the first embodiment of thepresent invention;

[0019]FIG. 3A is a view illustrating schematically image data selectedby the image data selecting means according to the first embodiment ofthe present invention;

[0020]FIG. 3B is a view showing schematically an array of lane markings,as viewed from the top in FIG. 3A;

[0021]FIG. 4 is a block diagram showing an arrangement of thevehicle-onboard driving lane recognizing apparatus according to a secondembodiment of the present invention;

[0022]FIG. 5 is a circuit block diagram showing concretely a circuitconfiguration of an image data transfer rate converting means accordingto the second embodiment of the present invention;

[0023]FIG. 6 is a view for graphically illustrating relation between adot clock signal DCK and a transfer clock signal derived by dividing thefrequency of the dot clock signal by two in the vehicle-onboard drivinglane recognizing apparatus according to the second embodiment of thepresent invention;

[0024]FIG. 7 is a block diagram showing an arrangement of thevehicle-onboard driving lane recognizing apparatus according to a thirdembodiment of the present invention;

[0025]FIG. 8 is a block diagram showing an arrangement of an imageinput/output interface of the vehicle-onboard driving lane recognizingapparatus according to the third embodiment of the present invention;

[0026]FIG. 9 is a block diagram showing an arrangement of thevehicle-onboard driving lane recognizing apparatus according to a fourthembodiment of the present invention; and

[0027]FIG. 10 is a block diagram showing an arrangement of thevehicle-onboard driving lane recognizing apparatus according to aversion of the fourth embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The present invention will be described in detail in conjunctionwith what is presently considered as preferred or typical embodimentsthereof by reference to the drawings. In the following description, likereference characters designate like or corresponding parts throughoutthe several views.

[0029] Embodiment 1

[0030] Now, description will be made of the vehicle-onboard driving lanerecognizing apparatus according to a first embodiment of the presentinvention. FIG. 1 is a block diagram showing an arrangement of thevehicle-onboard driving lane recognizing apparatus according to thefirst embodiment of the invention.

[0031] The vehicle-onboard driving lane recognizing apparatus isinstalled on a motor vehicle running on a road. Referring to FIG. 1, animage pick-up means (which may also be referred to as the imaging deviceor means) 1 is designed to pick up images of scenes making appearance infront of the motor vehicle, while an image data selecting means 2 is sodesigned as to select only the image data of specific zones or regionswhich are required for the recognition of a driving lane from thoseoutputted from the image pick-up means 1.

[0032] An image data storing means 3 is designed to store therein theimage data selected by the image data selecting means 2. A driving lanerecognizing means 4 is designed to detect lane markings by making use ofthe image data stored in the image data storing means 3 for therebyrecognizing the driving lane extending along the lane markings asdetected.

[0033] At this juncture, it should be noted that the image dataselecting means 2, the image data storing means 3 and the driving lanerecognizing means 4 are realized en bloc in a single or unitary chip 5as indicated by enclosing with a single-dotted broken line.

[0034] Incidentally, the image pick-up means 1 is shown as beingprovided externally of the chip 5. However, it goes without saying thatthe image pick-up means 1 may also be implemented on the chip 5similarly to the other components or means mentioned above, if it ispossible.

[0035] Next, description will be made in detail of the individualfunctional blocks.

[0036] At first, the image pick-up means 1 will be elucidated. The imagepick-up means 1 is designed for taking picture or image of scenes makingappearance in front of the motor vehicle in the course of running on aroad. In general, two types of the image pick-up means are well known inthe art. They are a CCD (Charge-Coupled Device) imaging device and aCMOS (Complementary Metal Oxide Semiconductor) imaging device. In thisconjunction, it is presumed that the CMOS imaging device incorporatingtherein an analogue-to-digital converter (ADC) is employed as the imagepick-up means in the vehicle-onboard driving lane recognizing apparatusaccording to the instant embodiment of the invention.

[0037] Incidentally, the image pick-up means 1 may be constituted by aCCD serving as the imaging device, a CCD driving IC (Integrated Circuit)and an analogue-to-digital converter (ADC).

[0038] Next, description will be directed to the image data selectingmeans 2. FIG. 2 is a block diagram showing a circuit arrangement of theimage data selecting means 2 according to the first embodiment of thepresent invention.

[0039] Since the circuit arrangement of the image data selecting means 2is self-explanatory from FIG. 2, description will be directed tooperation of the image data selecting means 2. A basic clock signal fordriving the image pick-up means 1 is inputted to the image pick-up means1. When various initial settings for the image pick-up means 1 have beencompleted, a dot clock signal DCK which changes by one cycle every timethe data of one pixel is outputted from the image data taken by theimage pick-up means 1, while a horizontal synchronizing signal HD and avertical synchronizing signal VD are outputted upon every inputting ofthe basic clock signal.

[0040] A horizontal counter 11 designed for counting the number ofpixels in the horizontal direction increments or counts up a count valueupon every inputting of the dot clock signals DCK. The count value ofthe horizontal counter 11 is cleared once when the horizontalsynchronizing signal HD is inputted.

[0041] The count value outputted from the horizontal counter 11 iscompared by a comparator 14 a with a horizontal start address (startaddress in the horizontal direction) preset at a horizontal startaddress hold module 12. When the count value becomes greater than thehorizontal start address, the output of the comparator 14 a changes froma level “L (low level)” to a level “H (high level)”.

[0042] Further, the count value outputted from the horizontal counter 11is compared by a comparator 14 b with a horizontal end address (endaddress in the horizontal direction) placed in a horizontal end addresshold module 13. So long as the count value remains smaller than thehorizontal end address, the output of the comparator 14 b assumes thelevel “H”, whereas when the count value becomes greater than thehorizontal end address, the output of the comparator 14 b changes to thelevel “L” from “H”.

[0043] A logical AND (logical product) circuit 15 a determines a logicalproduct of the outputs of the comparator 14 a and the comparator 14 b.The output signal of the logical AND circuit 15 a serves as the selectsignal in the horizontal direction. Thus, in the horizontal direction,the pixel data located from the horizontal start address to thehorizontal end address are selected from the image data picked up by theimage pick-up means 1.

[0044] Similarly, in the vertical direction, a vertical counter 16designed for counting the pixel number in the vertical directionincrements the count value thereof in response to inputting of thehorizontal synchronizing signal HD. The count value of the verticalcounter 16 is once cleared when the vertical synchronizing signal VD isinputted.

[0045] The count value outputted from the vertical counter 16 iscompared by a comparator 14 c with a vertical start address (startaddress in the vertical direction) preset at a vertical start addresshold module 17. When the count value becomes greater than the verticalstart address, the output of the comparator 14 c changes from a level“L” to a level “H” to be outputted.

[0046] Further, the count value outputted from the vertical counter 16is compared by a comparator 14 d with a vertical end address (endaddress in the vertical direction) placed in a vertical end address holdmodule 18. So long as the count value remains smaller than the verticalend address, the output of the comparator 14 d assumes the level “H”,whereas when the count value becomes greater than the vertical endaddress, the output of the comparator 14 d changes to the level “L” from“H”.

[0047] A logical AND circuit 15 b determines a logical product of theoutputs of the comparator 14 c and the comparator 14 d. The outputsignal of the logical AND circuit 15 b serves as the select signal inthe vertical direction. In other words, in the vertical direction, thepixel data located from the vertical start address to the vertical endaddress are selected from the image data picked up by the image pick-upmeans 1.

[0048] Finally, the output of the logical AND circuit 15 a representingthe select signal in the horizontal direction and the output of thelogical AND circuit 15 b representing the select signal in the verticaldirection are logically ANDed by a logical AND circuit 15 c, whereby theimage data select signal for one rectangular select range is generated.

[0049] By making use of the generated select signal, the image data isselected to be subsequently stored in the image data storing means 3 ofthe succeeding stage.

[0050] Incidentally, the image data selecting means shown in FIG. 2 isso arranged as to select one rectangular region or zone. In thisconjunction, it is to be added that in the case where a plurality ofregions or zones are to be selected, a corresponding number of the imagedata selecting means each of the structure similar to that shown in FIG.2 may be provided.

[0051] Further, although it has been described that the image dataselecting means shown in FIG. 2 is realized by employing hardware suchas the counters, comparators, etc., it goes without saying that theimage data selecting means may be implemented by a microcomputer whichis comprised of a CPU (Control Processing Unit), a RAM (Random AccessMemory) and a timer at the least. In that case, the image selection maybe realized by making use of the output signal waveform of the timerincorporated in the microcomputer.

[0052] In this conjunction, it should further be added that the imagedata selecting means 2, the image data storing means 3, and the drivinglane recognizing means 4 may be realized by a microcomputer, as will bedescribed hereinafter. In that case, it is preferred to realize theimage selection by making use of the output signal of the timer, becausethen the circuit scale can be made small with the cost being reduced.

[0053] Besides, by selecting the image by means of software incorporatedin the microcomputer, it is possible to change dynamically the selectrange of the image data in dependence on the recognized state of thedriving lane.

[0054] Additionally, the whole image may be selected by designating thestart address and the end address in both the horizontal and verticaldirections, as the case may be.

[0055] Next, referring to FIGS. 3A and 3B, description will be made asto what sort of the image data is selected by the image data selectingmeans 2 for the recognition of the driving lane. FIGS. 3A and 3B areviews for illustrating the image data selected in the vehicle-onboarddriving lane recognizing apparatus according to the first embodiment ofthe present invention.

[0056] According to a method adopted generally for recognizing thedriving lane, search zones are set for detecting lane markings 21painted on a road. In FIG. 3A, a plurality of search regions or zones 22a to 22 f set for the recognition of the driving lane are exemplarilyillustrated.

[0057] In this conjunction, it is noted that although a single searchregion or zone is defined by a rectangular region of (M×N) pixels with Mpixels in the horizontal direction and N pixels in the verticaldirection, where M and N represent given natural number, respectively,the search zone may be derived as a search line with the pixel number Nin the vertical direction being one.

[0058] As shown in FIG. 3A, the search regions or zones are disposed onthe road image lying beneath the horizon, starting from the top of theroad image.

[0059]FIG. 3B is a top plan view of the image shown in FIG. 3A. As shownin FIG. 3B, it is preferred to dispose the search regions or zonesorthogonally relative to the running or traveling direction of the motorvehicle substantially with equidistance among the search zones in thetraveling direction for the reason described later on. As the searchzones or regions for detecting the lane markings, there can be conceivedother varieties. However, description thereof is omitted.

[0060] The image data of the individual search zones or regions selectedby the image data selecting means 2 are stored in the image data storingmeans 3.

[0061] The driving lane recognizing means 4 detects the lane markings byprocessing the image data stored in the image data storing means 3 tothereby recognize a driving lane extending along the lane markings.

[0062] Next, description will be directed to the recognition of thedriving lane as carried out by the driving lane recognizing means 4. Asdescribed previously, the position at which the lane marking exists inthe selected search zone or region is detected. As the lane markingdetecting method, there may be mentioned a conventional filterprocessings such as template matching or the like.

[0063] For effectuating the template matching, a template which exhibitsa luminance distribution similar to that of the object to be detected isprepared, and the one exhibiting the highest correlation with thetemplate is selected as the object concerned.

[0064] By way of example, presuming that the search zone shown in FIG.3A are in the form of a search line, pulses of the luminance signalindicate the positions of the lane markings exhibiting high luminance.Further, by preparing a one-dimensional template for the lane markingand shifting the template bit by bit, for example, from the left,difference between the luminance signals is determined to thereby detectthe location where the difference is greatest. Thus, it is decided thatthe location mentioned above exhibits the highest correlation with thetemplate. In other words, it can be determined that the locationmentioned above indicates the position of the lane marking.

[0065] On the basis of the positions of the lane markings detected inthe individual search zones, respectively, the parameter representingthe driving lane (road geometry) which can be represented by apolynomial or the like can be identified to be the result of recognitionof the driving lane.

[0066] As described previously, by selectively setting the individualsearch zones such that they are disposed substantially with equidistancein the traveling direction, as viewed from the top, the detectedpositions of the lane markings will also lie with equidistancetherealong. Thus, the parameter of the driving lane expressed by thepolynomial or the like can be identified without any difficulty.

[0067] Next, description will be made of the single-dotted line block 5shown in FIG. 1. The block 5 incorporating the image data selectingmeans 2, the image data storing means 3 and the driving lane recognizingmeans 4, as shown in FIG. 1, is realized as a single chip. In thisconjunction, it is to be noted that the term “chip” used herein is usedto mean primarily the chip dedicated to the image processing, i.e.,image processing dedicated chip. It should however be understood thatsuch chip can be realized by a microcomputer incorporating therein asthe indispensable components a CPU, a RAM and a timer at the least.Accordingly, the term “chip” used herein is to be interpreted such thatthe microcomputer chip is covered as well.

[0068] In recent years, the capacity of the RAM incorporated integrallyin the microcomputer tends to increase. However, the microcomputerincorporating the RAM of a large capacity capable of storing all theimage data of, for example, 640×480 pixels, which is termed generallyVGA (video graphics array) according to the video standards for PC,while allowing the program to run, is extremely expensive.

[0069] Such being the circumstances, according to the teachings of thepresent invention incarnated in the instant embodiment thereof, it istaught that the image data selecting means 2, the image data storingmeans 3 and the driving lane recognizing means 4 at the least arerealized in one and the same chip, wherein only the image data of thespecific region required for the recognition of the driving lane isselected by the image data selecting means 2 to be subsequentlytransferred to the image data storing means 3 (i.e., the so-calledbuilt-in RAM). By virtue of this arrangement, the built-in RAM can be ofa small capacity and thus the chip can be realized significantly at verylow cost. In other words, according to the teaching of the presentinvention incarnated in the instant embodiment, the vehicle-onboarddriving lane recognizing apparatus of small circuit scale and low costcan be realized advantageously for practical applications.

[0070] At this juncture, it should also be added that so far as all theimage data required for the recognition of the driving lane can bestored in the built-in RAM, there arises no necessity of providing anextraneous RAM externally of the chip to another advantage.

[0071] Furthermore, in the conventional vehicle-onboard image processingsystem, the image data is not intactly stored but a primitive processingcalled a so-called pre-processing such as typified by a simple filteringprocessing of the image data is performed by employing a dedicated ICsuch as an ASIC (application-specific integrated circuit) or the like.By contrast, in the case of the vehicle-onboard driving lane recognizingapparatus according to the instant embodiment of the invention, all theimage data 1 are saved in the RAM incorporated in the chip 5 or themicrocomputer chip. Accordingly, the pre-processing mentioned above canwholly be carried out softwarewise by taking advantage of high-seedaccess capability.

[0072] As is obvious from the above, extraneous external RAM and thededicated IC such as application-specific integrated circuit can bespared, whereby the size or scale as well as the cost of the apparatuscan remarkably be reduced.

[0073] Embodiment 2

[0074] In the vehicle-onboard driving lane recognizing apparatusaccording to the first embodiment of the present invention describedabove, no consideration has been paid to the transfer rate of the imagedata. According to the teaching of the invention incarnated in a secondembodiment, there is adopted an arrangement for converting the transferrate of the data derived from the output of the image pick-up means 1.

[0075]FIG. 4 is a block diagram showing an arrangement or structure ofthe vehicle-onboard driving lane recognizing apparatus according to thesecond embodiment of the present invention. Incidentally, componentssame as or equivalent to those described hereinbefore by reference toFIG. 1 are denoted by like reference numerals and repeated descriptionin detail thereof will be omitted.

[0076] Referring to FIG. 4, the vehicle-onboard driving lane recognizingapparatus according to the instant embodiment of the invention isprovided with a pixel data transfer rate converting means 31 forconverting the transfer rate of the pixel data of the image picked up bythe image pick-up means 1.

[0077] At this juncture, it should be mentioned that the single-dottedbroken line block 5 may be implemented as a single chip. In that case,only the image pick-up means 1 is provided externally of the chip 5. Itgoes however without saying that in case the image pick-up means 1 canbe incorporated in the chip 5, it may be built in the chip similarly tothe other means or components. Furthermore, although the block 5 may beconstituted by a dedicated IC for the image processing, it is presumedthat in the vehicle-onboard driving lane recognizing apparatus accordingto the instant embodiment of the invention, the block 5 is constitutedby a microcomputer which includes as the indispensable components a CPU,a RAM and a timer at the least.

[0078] Description will now be directed to the operation of the pixeldata transfer rate converting means 31. In the case where the outputrate of the pixel data is lower than the transfer rate inherent to themicrocomputer, it is possible to input the image data delivered from theimage pick-up means intactly to the RAM incorporated in themicrocomputer. On the other hand, when the output rate of the pixel datais higher than the transfer rate inherent to the microcomputer, theimage data can be fetched by the microcomputer by lowering the transferrate of the pixel data by adopting the arrangement shown in FIG. 5, aswill be described below.

[0079] More specifically, by making use of a dot clock signal whichchanges by one cycle every time the pixel data of one pixel (pictureelement) is outputted from the image pick-up means, the pixel data canbe transferred to the built-in RAM of the microcomputer at the transferrate corresponding to 1/M of the output rate of one pixel data, where Mrepresents a given natural number.

[0080]FIG. 5 is a circuit block diagram showing concretely a circuitconfiguration of the pixel data transfer rate converting means 31.Referring to FIG. 5, operation of the pixel data transfer rateconverting means 31 will be described below on the presumption that M isequal to “2”.

[0081] The pixel data outputted sequentially from the image pick-upmeans 1 are supplied to input ports D[7 . . . 0] of D-flip-flops (DFFs)36 and 37 to be stored in the D-flip-flops 36 and 37 under the timing ofthe dot clock signal DCK which changes by one cycle every time one pixelof the pixel data is outputted.

[0082] In this conjunction, it is to be noted that the pixel dataoutputted from the output port Q[7 . . . 0] of the D-flip-flop 37temporally proceeds by one pixel relative to the pixel data outputtedfrom the output port Q[7 . . . 0] of the D-flip-flop 36.

[0083] On the other hand, the frequency of the dot clock signal DCK islowered to a half by means of a frequency by-two-division circuit whichmay be realized by a T-flip-flop (TFF) 38. Relation between the originaldot clock signal DCK and the transfer clock whose frequency is equal toa quotient resulting from division of the dot clock DCK by two is suchas illustrated in FIG. 6.

[0084] When pixel data of two pixels have been inputted with two dotclocks DCK, the pixel data of two pixels are transferred to themicrocomputer.

[0085] In this manner, two pixel data each of 8 bits which temporallycontinue to each other are made available from the outputs of theD-flip-flops 36 and 37 to be transferred to the built-in RAM of themicrocomputer from the 16-bit transfer port under the timing of thetransfer clock signal.

[0086] As is apparent from the foregoing, with the circuit arrangementdescribed above, it is possible to fetch the image data on a real-timebasis even when the transfer rate at which the pixel data is transferredto the built-in RAM of the microcomputer is lower than the output rateof the pixel data outputted from the image pick-up means 1 by latching apredetermined number of pixel data and by transferring en bloc the pixeldata when the predetermined number of the pixel data have been latched.

[0087] In this manner, by realizing the pixel data transfer rateconverting means 31 for converting the transfer rate of the image datawith a simplified structure, the select range of the microcomputer canbe broadened, which in turn means that the microcomputer of low cost andlow transfer rate can be employed while mitigating limitation imposed onthe built-in RAM capacity of the microcomputer similarly to the case ofthe first embodiment of the invention, whereby the total cost demandedfor the vehicle-onboard driving lane recognizing apparatus can bereduced.

[0088] Embodiment 3

[0089] In the case of the vehicle-onboard driving lane recognizingapparatus first and second embodiments of the present invention, theimage data outputted from the image pick-up means 1 are fetched for use.According to the teaching of the present invention incarnated in a thirdembodiment thereof, image data available from an external system orequipment can also be made use of.

[0090]FIG. 7 is a block diagram showing an arrangement or structure ofthe vehicle-onboard driving lane recognizing apparatus according to thethird embodiment of the present invention. Incidentally, in FIG. 7,components same as or equivalent to those described hereinbefore byreference to FIGS. 1 and 4 are denoted by like reference numerals andrepeated description in detail thereof will be omitted.

[0091] Referring to FIG. 7, in the vehicle-onboard driving lanerecognizing apparatus according to the instant embodiment of theinvention, all the image data derived from the output of the imagepick-up means 1 are also outputted to an external system or equipment.The vehicle-onboard driving lane recognizing apparatus now underconsideration is provided with an image input/output interface 41 whichis so designed as to transfer the image data inputted from the externalsystem or equipment to the image data storing means 3 by way of theimage data selecting means 2 in place of the image data outputted fromthe image pick-up means 1, when the image data is supplied from theexternal system or equipment.

[0092]FIG. 8 is a block diagram showing an arrangement or structure ofthe image input/output interface 41 of the vehicle-onboard driving lanerecognizing apparatus according to the third embodiment of the presentinvention. Incidentally, components same as or equivalent to thosedescribed hereinbefore by reference to FIGS. 1, 4 and 7 are denoted bylike reference numerals and repeated description in detail thereof willbe omitted.

[0093] At this juncture, it should also be mentioned that thesingle-dotted broken line block 5 may be implemented as in the form of asingle chip. In that case, only the image pick-up means 1 is providedexternally of the chip 5. It goes however without saying that in casethe image pick-up means 1 can be incorporated in the chip 5, it may bebuilt in the chip similarly to the other means or constituents.

[0094] Now referring to FIG. 8, an external image input decision module46 is designed to make decision as to whether or not the image data isinputted from the external system and output a decision signal EXTIN oflevel “H” when it is determined that the image data is inputtedexternally. On the other hand, when it is determined that no externalimage data input exists, the external image input decision module 46outputs the decision signal EXTIN of level “L”.

[0095] The decision signal EXTIN is used as a gate signal forthree-state buffers 47 a and 47 b, respectively. Unless the image datais inputted from the external system, the image data derived from theoutput of the image pick-up means 1 is delivered intactly from theoutput of the three-state buffer 47 a since the decision signal EXTIN isof “L” level, while the output of the three-state buffer 47 b exhibits ahigh impedance.

[0096] Consequently, in the above-mentioned case, the image dataoutputted from the image pick-up means 1 are transferred to the imagedata storing means 3 by way of the image data selecting means 2 and atthe same time the image data outputted from the image pick-up means 1are supplied to the external system through image output line.

[0097] On the other hand, in the case where the image data are inputtedfrom the external system, the decision signal EXTIN will then assume thelevel “H”. In that case, the output of the three-state buffer 47 aexhibits high impedance, whereby the externally inputted image datadelivered from the output of the three-state buffer 47 b are transferredto the image data storing means 3 via the image data selecting means 2.Further, the externally inputted image data is supplied to the externalsystem through the image output line as well.

[0098] By virtue of the arrangement of the vehicle-onboard driving lanerecognizing apparatus described above, even through only the image dataof a given limited region or zone can be stored internally of theapparatus, the whole image can also be observed or confirmed because allthe image data are outputted externally.

[0099] Furthermore, in the case where the image data is available fromthe external system or equipment, the image data can be transferred tothe image data storing means 3 incorporated in the apparatus. Then, theimage data taken upon running or driving test or for the other purposemay be inputted from a relevant external system or equipment to therebylogically examine the driving lane recognition processing on a desk.

[0100] At this juncture, it should be mentioned that substantially onlythe three-state buffers 47 a and 47 b are additionally incorporated inthe apparatus for realizing the function described above. In otherwords, the functions for checking or observing the whole image as wellas for the logical examination on the desk can be added withoutincreasing appreciably the control signal of the whole apparatus.

[0101] Embodiment 4

[0102] In the description of the first to third embodiments of theinvention, no consideration has been paid to the basic clock signalsupply. The vehicle-onboard driving lane recognizing apparatus accordingto a fourth embodiment of the present invention is so arranged that theindividual means thereof are driven on the basis of a basic clock signalsupplied from a single oscillator.

[0103] Referring to FIG. 9, the vehicle-onboard driving lane recognizingapparatus is provided with an oscillator 51 for supplying the basicclock signal to the image pick-up means 1 and the block 5, wherein theimage pick-up means 1 is comprised of an image-pickup device 1 a and adedicated driving signal generating means 1 b which is dedicated fordriving the image-pickup device 1 a.

[0104] In operation, the basic clock signal supplied to the imagepick-up means 1 from the oscillator 51 is inputted to the dedicateddriving signal generating means 1 b incorporated in the image pick-upmeans 1.

[0105] The dedicated driving signal generating means 1 b is designed togenerate various driving signals such as the horizontal synchronizingsignal HD and the vertical synchronizing signal VD for driving theimage-pickup device 1 a and others.

[0106] The generated driving signals are inputted to the image-pickupdevice 1 a for driving the same. The image-pickup device 1 a outputs theimage data which are then stored in the image data storing means 3 byway of the image data selecting means 2.

[0107] The driving lane recognizing means 4 executes the processing forrecognizing the driving lane by making use of the image data stored inthe image data storing means 3. Parenthetically, operation of thedriving lane recognizing means 4 is similar to that describedhereinbefore in conjunction with the preceding embodiments of theinvention. Accordingly, repeated description will be unnecessary.

[0108] At this juncture, it is to be noted that the basic clock signalfor driving the image pick-up means 1 is in common to the clock fordriving the image data selecting means 2, the image data storing means 3and the driving lane recognizing means 4.

[0109] In the case of the conventional vehicle-onboard driving lanerecognizing apparatus, the basic clock signal for driving the imagepick-up means 1 is prepared separately from the clock signal for drivingthe other units than the image pick-up means 1 in view of the videosignal standards. By contrast, in the vehicle-onboard driving lanerecognizing apparatus according to the instant embodiment of theinvention, the basic clock signal is commonly used for driving not onlythe image pick-up means 1 and the other portions (e.g. block 5). Inother words, employment of the single oscillator is sufficient. Owing tothis feature, the timing circuit design can be simplified andfacilitated.

[0110] Further, for driving the image pick-up means 1 together with theother units with the common basic clock signal, such arrangement asshown in FIG. 10 can also be adopted.

[0111]FIG. 10 is a block diagram showing an arrangement or structure ofthe vehicle-onboard driving lane recognizing apparatus according to thefourth embodiment of the present invention. Incidentally, in FIG. 10,components same as or equivalent to those described hereinbefore byreference to FIGS. 1, 4, 7 and 9 are denoted by like reference numeralsand repeated description in detail thereof will be omitted.

[0112] In the vehicle-onboard driving lane recognizing apparatus shownin FIG. 10, the block 5 is realized as a microcomputer which includes aCPU, a RAM and a timer at the least as the indispensable components.This microcomputer operates under the timing of the basic clock signalsupplied from the oscillator 51.

[0113] In the vehicle-onboard driving lane recognizing apparatus shownin FIG. 9, the driving signal for driving the image-pickup device 1 a isgenerated by the dedicated driving signal generating means 1 b. On theother hand, in the case of the vehicle-onboard driving lane recognizingapparatus shown in FIG. 10, the driving signal mentioned above isgenerated by the timer incorporated in the microcomputer. Accordingly,the dedicated driving signal generating means 1 b which is required fordriving the image-pickup device 1 a in the vehicle-onboard driving lanerecognizing apparatus shown in FIG. 9 can be spared in thevehicle-onboard driving lane recognizing apparatus shown in FIG. 10.Thus, the vehicle-onboard driving lane recognizing apparatus shown inFIG. 10 can be realized on a much smaller scale basis when compared withthat shown in FIG. 9.

[0114] As can be understood from the above, by driving the image pick-upmeans 1 and the other components with a common clock signal, it issufficient to employ only one oscillator 51, which means that thevehicle-onboard driving lane recognizing apparatus can be manufacturedat low cost. Besides, because the components or means incorporated inthe vehicle-onboard driving lane recognizing apparatus are driven by thecommon clock signal, the arrangement for timing properly the operationof these means can easily be designed and implemented.

[0115] Further, by generating the driving signal for driving theimage-pickup device 1 a by means of the built-in timer 52 incorporatedin the microcomputer as in the case of the vehicle-onboard driving lanerecognizing apparatus shown in FIG. 10, the circuit scale can further bereduced.

[0116] It should however be mentioned that although the image pick-upmeans 1 and the other components or means are operated under the timingof the one and the same clock signal in the vehicle-onboard driving lanerecognizing apparatus according to the instant embodiment of theinvention, such arrangement may of course be adopted that the basicclock signal for driving the image pick-up means 1 is N times as high asthe clock signal for operating the other means or components oralternatively the frequency of the basic clock signal for driving theimage pick-up means 1 may be 1/N of that of the clock signal for drivingthe other means or components, where N represents a given naturalnumber.

[0117] The block 5 indicated as enclosed by the single-dotted brokenline may be realized in one chip. In that case, only the image pick-upmeans 1 is provided externally of the single-dotted line block 5. Itshould however be appreciated that the image pick-up means 1 may beincorporated in the chip 5 together with the other means or componentsif it is possible.

[0118] In general, the exposure control based on the luminanceinformation of the whole image will incur essentially no problem.However, in the case of the vehicle-onboard image processing apparatus,it is preferred to prevent the luminance information of the unnecessaryimage region from being reflected in the exposure control. In otherwords, the exposure control should ideally be performed by making use ofthe luminance information of a concerned or relevant portion of theimage. In that case, a luminance measuring timing signal is required formeasuring luminance of the concerned portion of the image in synchronismwith the operation timing of the image pick-up means 1. In thisconjunction, it should be noted that because the same basic clock signalis employed commonly for all the components of the vehicle-onboarddriving lane recognizing apparatus realized in the arrangement shown inFIG. 10, the luminance measuring timing signal can equally be derivedfrom the output of the timer incorporated in the microcomputer.

[0119] Many modifications and variations of the present invention arepossible in the light of the above techniques. It is therefore to beunderstood that within the scope of the appended claims, the inventionmay be practiced otherwise than as specifically described.

What is claimed is:
 1. A vehicle-onboard driving lane recognizingapparatus, comprising: image pick-up means mounted on a motor vehiclerunning on a road for picking up images of scenes making appearance infront of said motor vehicle; image data selecting means for selectingimage data only of a predetermined region from the image picked up bysaid image pick-up means; image data storing means for storing saidimage data; and driving lane recognizing means for detecting lanemarkings on said road from the image data stored in said image datastoring means to thereby recognize a driving lane extending along saidlane markings, wherein at least said image data selecting means, saidimage data storing means and said driving lane recognizing means are allimplemented in a single chip.
 2. A vehicle-onboard driving lanerecognizing apparatus according to claim 1, said image data selectingmeans, said image data storing means and said driving lane recognizingmeans being realized by a microcomputer which incorporates thereinsoftware for selecting the image data of said predetermined region and atimer, wherein said image data selecting means is so designed as toselect the image data in dependence on high level and low level of anoutput signal of said timer while changing dynamicallyselection-subjected objects contained in said image data.
 3. Avehicle-onboard driving lane recognizing apparatus according to claim 1,further comprising: an oscillator designed to output a basic clocksignal for controlling said image data selecting means, said image datastoring means and said driving lane recognizing means, wherein a controlsignal for controlling said image pick-up means is generated on thebasis of said basic clock signal.
 4. A vehicle-onboard driving lanerecognizing apparatus according to claim 1, said image data selectingmeans, said image data storing means and said driving lane recognizingmeans being realized by a microcomputer which incorporates therein atimer, wherein an output signal of said timer is made use of as acontrol signal for controlling said image pick-up means.
 5. Avehicle-onboard driving lane recognizing apparatus according to claim 1,wherein said image data selecting means is so arranged as to select aplurality of predetermined regions on a road which corresponds to animage located beneath the horizon from an image picked up by said imagepick-up means, said plurality of predetermined regions extendingorthogonally to a traveling direction of said motor vehiclesubstantially with equidistance among said predetermined regions asviewed in the traveling direction of said motor vehicle.
 6. Avehicle-onboard driving lane recognizing apparatus, comprising: imagepick-up means mounted on a motor vehicle running on a road for pickingup images of scenes making appearance in front of said motor vehicle tothereby output picked-up images in the form of pixel data; image datatransfer rate converting means for converting transfer rate of saidpixel data for transferring said pixel data at a converted transferrate; image data selecting means for selecting the image data of apredetermined region from image data constituted by a set of said pixeldata outputted from said pixel data transfer rate converting means;image data storing means for storing the image data selected by saidimage data selecting means; and driving lane recognizing means fordetecting lane markings on said road from the image data stored in saidimage data storing means to thereby recognize a driving lane extendingalong said lane markings, wherein representing the number of said pixeldata by M while representing the number of bits of said pixel data by N(where M and N are given natural numbers, respectively), said pixel datatransfer rate converting means is so arranged as to transform M pixeldata each of N bits into a single (M×N)-bit data for therebytransferring said (M×N)-bit data to said image data selecting means enbloc through a single transfer at a time point when M pixel data each ofN bits have been held.
 7. A vehicle-onboard driving lane recognizingapparatus according to claim 6, said image data selecting means, saidimage data storing means and said driving lane recognizing means beingrealized by a microcomputer which incorporates therein software forselecting the image data of said predetermined region and a timer,wherein said image data selecting means is so designed as to select theimage data in dependence on high level and low level of an output signalof said timer while changing dynamically selection-subjected objectscontained in said image data.
 8. A vehicle-onboard driving lanerecognizing apparatus according to claim 6, further comprising: anoscillator designed to output a basic clock signal for controlling saidimage data selecting means, said image data storing means and saiddriving lane recognizing means, wherein a control signal for controllingsaid image pick-up means is generated on the basis of said basic clocksignal.
 9. A vehicle-onboard driving lane recognizing apparatusaccording to claim 6, said image data selecting means, said image datastoring means and said driving lane recognizing means being realized bya microcomputer which incorporates therein a timer, wherein an outputsignal of said timer is made use of as a control signal for controllingsaid image pick-up means.
 10. A vehicle-onboard driving lane recognizingapparatus according to claim 6, wherein said image data selecting meansis so arranged as to select a plurality of predetermined regions on aroad which corresponds to an image located beneath the horizon from animage picked up by said image pick-up means, said plurality ofpredetermined regions extending orthogonally to a traveling direction ofsaid motor vehicle substantially with equidistance among saidpredetermined regions as viewed in the traveling direction of said motorvehicle.
 11. A vehicle-onboard driving lane recognizing apparatus,comprising: image pick-up means mounted on a motor vehicle running on aroad for picking up images of scenes making appearance in front of saidmotor vehicle; image input/output interface means for selecting one ofinput from said image pick-up means and input from an external systemfor outputting the selected image data; image data selecting means forselecting image data of only a predetermined region from said imagedata; image data storing means for storing the image data selected bysaid image data selecting means; and driving lane recognizing means fordetecting lane markings on said road from the image data stored in saidimage data storing means to thereby recognize a driving lane extendingalong said lane markings, wherein said image input/output interfacemeans is so arranged that when it is decided that the image dataoriginating in said external system is inputted, said image input/outputinterface means selects said external system as an input source tothereby allow said image data supplied from said input source to beoutputted to said image data selecting means and said external system,whereas when it is decided that the image data is not inputted from saidexternal system, said image input/output interface means selects saidimage pick-up means as the input source to thereby output the image datasupplied from said image pick-up means to said image data selectingmeans and said external system.
 12. A vehicle-onboard driving lanerecognizing apparatus according to claim 11, said image data selectingmeans, said image data storing means and said driving lane recognizingmeans being realized by a microcomputer which incorporates thereinsoftware for selecting the image data of said predetermined region and atimer, wherein said image data selecting means is so designed as toselect the image data in dependence on high level and low level of anoutput signal of said timer while changing dynamicallyselection-subjected objects contained in said image data.
 13. Avehicle-onboard driving lane recognizing apparatus according to claim11, further comprising: an oscillator designed to output a basic clocksignal for controlling said image data selecting means, said image datastoring means and said driving lane recognizing means, wherein a controlsignal for controlling said image pick-up means is generated on thebasis of said basic clock signal.
 14. A vehicle-onboard driving lanerecognizing apparatus according to claim 11, said image data selectingmeans, said image data storing means and said driving lane recognizingmeans being realized by a microcomputer which incorporates therein atimer, wherein an output signal of said timer is made use of as acontrol signal for controlling said image pick-up means.
 15. Avehicle-onboard driving lane recognizing apparatus according to claim11, wherein said image data selecting means is so arranged as to selecta plurality of predetermined regions on a road which corresponds to animage located beneath the horizon from an image picked up by said imagepick-up means, said plurality of predetermined regions extendingorthogonally to a traveling direction of said motor vehiclesubstantially with equidistance among said predetermined regions asviewed in the traveling direction of said motor vehicle.